Lattice Semiconducto
|
||||||||||||||||||||||||||||||||||||||||||
|
Главная » Всё для Windows » Системы для бизнеса, офиса, научной и проектной работы » САПР (электроника, автоматика, ГАП) |
| Статистика раздачи | |
| Размер: 1,74 GB | Зарегистрирован: 8 лет 2 месяца | Скачан: 20 раз | |
|
|
| Автор | Сообщение | |||||||||||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
|
Скачать Autocad ® Пол: Стаж: 9 лет 1 месяц Сообщений: 3522
|
Lattice Semiconductor Lattice Diamond v3.5.0.102 (x86)
Год/Дата Выпуска: 2/22/2016 Версия: 3.5.0 Build 102 Разработчик: Lattice Semiconductor Сайт разработчика: http://www.latticesemi.com Разрядность: 32bit Язык интерфейса: Английский Таблэтка: Присутствует Системные требования: The basic system requirements for Lattice Diamond are: Intel Pentium or Pentium-compatible PC, or AMD Opteron system support (Linux only) CPU with the SSE3 instruction set to run the Aldec Active-HDL Lattice Edition simulator One of the following operating systems: Windows Vista (32-bit), Windows 7 (32-bit or 64-bit), or Windows 8 (32-bit or 64-bit). System Requirements Release Notes for Lattice Diamond 3.5 Red Hat Enterprise Linux 4.X, 5.3, or 6. The host operating system can be either 32-bit or 64-bit. Version 5.3 of Red Hat Enterprise Linux has some extra installation requirements. See “Configuring Red Hat 5.3” on page 10. Novell SUSE Linux Enterprise 10 SP1 or 11 operating system. Novell SUSE Linux supports 32-bit only. Approximately 5.75 GB free disk space RAM adequate for your FPGA design. For guidelines see “Memory Requirements” on page 9. Network adapter and, for a floating license, network connectivity A node-locked license is based on the physical (hard-coded) address provided by the network adapter. Network connectivity is not required for a node-locked license. In the absence of a network connection, you can install the NWLink IPX/SPX protocol to force recognition of your NIC card ID (see the installation notice). A floating license requires access to the license server, so both a network adapter and connectivity are required. JavaScript-capable Web browser Microsoft Internet Explorer 8 or higher if using the included Aldec ActiveHDL Lattice Edition simulator Acrobat Reader 5.0 or later Описание: Система проектирования от американского производителя ПЛИС (FPGA) для своих же микросхем, конкурент Altera и Xilinx - Diamond Version 3.5 New Device Support ECP5 family access using standard Diamond user licenses ECP5U (non-serdes): Free or Subscription license ECP5UM (serdes): Subscription License Clarity Designer Tool (ECP5 only) Planner – enable un-placement of individual ports, rather than the entire interface. SEI Editor Tool (ECP5 only) – this is a new tool used to create single event errors to an operating ECP5 for system testing (general access) Lattice Synthesis Engine (LSE) Support added for 4 Diamond FPGA families. LSE will be selected for the synthesis tool, by default, for new projects targeting these families. Existing projects will continue to use the synthesis tool previously used by that project. LatticeECP2, LatticeECP2M LatticeECP3 LatticeXP2 Note – families previously supported: MachXO, MachXO2, MachXO3L, ECP5 Feature addition: support of non-zero initialization of register Continued improvements to the Netlist Analyzer. For example: Enhanced performance of major commands: filter, expand, flatten Enhance cross probe from post-MAP view to Technology view, improving accuracy Enhance “property dialog” and “tooltip”, displaying parameter information and correct fan-outs number for nets Updated HDL attributes: support of syn_encoding = “safe” Diamond Programmer Add Diamond Deployment Tool hex conversion options Updates to device programming General access to ECP5 Synopsys SynplifyPro Synthesis update: to version J-2015.03L Aldec Active-HDL Simulation no change (version 10.1) Доп. информация: Diamond Feature List Standard FPGA design flow functions Lattice Synthesis Engine (LSE): Lattice developed logic-synthesis tool designed specifically to produce the best possible results for ultra-low density and low density FPGAs (for more information please click here – go to LSE page) Intuitive HDL text editor that includes keyword highlight support for VHDL, Verilog HDL, EDIF, and Lattice Preference Language IPexpress: an integrated interface to Lattice catalog of functional modules, reference designs, and intellectual property(IP), all optimized for Lattice programmable products Netlist Analyzer: an integrated pre and post synthesis result GUI LSE editor Clarity Designer Platform Designer: a tool that enables you to create and control a complete hardware system using the Platform Manager 2 device or MachXO2 with external analog sense and control (ASC) Lattice Synthesis Engine (LSE): Lattice developed logic-synthesis tool designed specifically to produce the best possible results for ultra-low density and low density FPGAs (for more information please click here – go to LSE page) Spreadsheet View: GUI tool to allow users to enter and view design constraints such as pin assignments, clock resource usage, global preferences, timing preferences and more Package View: Easy graphical assignment tool of signals to pins that also allows SSO noise analysis Floorplan View to provide the ability to view and edit placement constraints Physical View to provide a detailed read-only view of the physical routing of paths for more detailed understanding of timing issues Netlist View to provide browsing of design ports, instances, and nets for drag and dropping into other views such as Package View for setting constraints NCD View to provide access to detailed usage information of physical components such as SLICEs, PIOs, IOLOGIC, and other elements Device View to provide the ability to browse device specific resources and cross-probe to other views Cross probing across the views above ECO Editor provides quick access to commonly used netlist editing functions such as sysIO settings, PLL parameters, and memory initialization without having to use a full editor such as EPIC Multiple implementations in a project to allow multiple versions of a design within a single project for easy design exploration Multiple Strategies for implementation “recipes” to be applied to any implementation within a project or shared between projects Run Manager view to allow parallel processing of multiple implementations in order to explore design alternatives for the best results Timing Analysis View offers an easy to use graphical environment for navigating timing information Power Calculator uses highly accurate data models along with a data driven power model to provide power estimation and calculation results, graphical power displays, and reports Reveal Inserter uses a signal-centric model that allows easy insertion of embedded logic analyzer debug hardware for real-time analysis Reveal Analyzer features the ability to use, multi-event triggering which can be dynamically changed at run-time and an integrated waveform for displaying captured events from the target FPGA Simulation Wizard to guide you through all the necessary steps to get your design to a simulator in the format you want Fully integrated into Diamond and standalone, Programmer allows easy direct normal programming of single or multiple FPGA devices Diamond Deployment Tool provides an intuitive wizard approach to create the appropriate device programming file in the format required by your deployment method Tcl Scripting Support Third Party Tools: Synopsys Synplify Pro and Aldec Active-HDL Lattice Edition II СкриншотыСкриншоты окна About
|
|||||||||||||||||||
![[Профиль]](./templates/default/images/ru/icon_profile.gif "Посмотреть профиль"){kind=icon} ![[ЛС]](./templates/default/images/ru/icon_pm.gif "Отправить ЛС"){kind=icon} |
||||||||||||||||||||
![[Цитировать]](./templates/default/images/ru/icon_quote.gif "Ответить с цитатой"){kind=icon}
|
|
Главная » Всё для Windows » Системы для бизнеса, офиса, научной и проектной работы » САПР (электроника, автоматика, ГАП) |
Текущее время: Сегодня, в 16:22
Часовой пояс: GMT + 4
Вы не можете начинать темы
Вы не можете отвечать на сообщения Вы не можете редактировать свои сообщения Вы не можете удалять свои сообщения Вы не можете голосовать в опросах Вы не можете прикреплять файлы к сообщениям Вы можете скачивать файлы |
